학술논문
Degree-Matched Check Node Decoding for Regular and Irregular LDPCs
Document Type
Periodical
Author
Source
IEEE Transactions on Circuits and Systems II: Express Briefs IEEE Trans. Circuits Syst. II Circuits and Systems II: Express Briefs, IEEE Transactions on. 53(10):1054-1058 Oct, 2006
Subject
Language
ISSN
1549-7747
1558-3791
1558-3791
Abstract
This brief examines different parity-check node decoding algorithms for low-density parity-check (LDPC) codes, seeking to recoup the performance loss incurred by the min-sum approximation compared to sum–product decoding. Two degree-matched check node decoding approximations that depend on the check node degree$d_c$are presented. Both have low complexity and can be applied to any degree distribution. Simulation results show near sum–product decoding performance for both degree-matched check node approximations for regular and irregular LDPCs.