학술논문
A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s
Document Type
Conference
Author
Source
2013 Proceedings of the ESSCIRC (ESSCIRC) ESSCIRC (ESSCIRC), 2013 Proceedings of the. :193-196 Sep, 2013
Subject
Language
ISSN
1930-8833
Abstract
This paper presents a 65nm embedded flash macro for automotive applications with read and write throughput of 5.7GB/s and 1.4MB/s respectively. The high read throughput rate is achieved by using the multi voltage domain multiplexer design enabling a low voltage read path and the local ground referenced read circuit design utilizing the robust time domain source side sense amplifier (SoSiSA) [1]. This allows low voltage sub 50mV swing read operation for high speed read-out under more than 30mV system noise. The hot source triple poly (HS3P) embedded flash memory cell [2] allows sub 5µs low current write operation enabling high write throughput up to a junction temperature of 170°C.