부산대학교 도서관

A delay cell is presented to implement highly-linear current-controlled ring oscillators as used in analog-to-digital converters. It consists of a NOT gate whose propagation delay is controlled by an input current, and two extra NOT gates with constant supply voltage configuration. Under well-controllable conditions the propagation delay of the first NOT gate can be set much longer than the delay of the other two NOT gates, leading to a linear relation between the input current and the oscillation frequency, hence significantly reducing the total harmonic distortion for single-ended architectures. A prototype of a 5-stage current-controlled ring oscillator has been designed and manufactured in a 65-nm CMOS technology, and validated experimentally. Several samples of the prototype design have been measured, showing a high robustness against PVT variations without requiring any type of calibration. The ring oscillator occupies only 0.00094 mm2, consumes $22 \mu \text{W}$ , and has a worst-case of total harmonic distortion equal to–59 dBc (0.6% of relative nonlinearity error).