학술논문

TCAD modelling of PLAD implantations and application to sub-65nm technological nodes [plasma doping]
Document Type
Conference
Source
Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Solid-state device research conference Solid-State Device Research Conference, 2004. ESSDERC 2004. Proceeding of the 34th European. :405-408 2004
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Semiconductor process modeling
Plasma applications
Doping
Plasma immersion ion implantation
Plasma simulation
Isolation technology
Ion implantation
US Department of Energy
Response surface methodology
Boron
Language
Abstract
Plasma doping (PLAD) is an ion implantation technique under investigation to realize ultra-shallow junctions for 65 nm nodes and beyond. This technique has been modelled and is integrated in TCAD process simulation tools. The most influential parameters of PLAD have been isolated. With these parameters, a design of experiments (DOE) has been performed to interpolate a quadratic surface response model of PLAD profiles. Boron implantations were studied in the range from 1 to 8 keV and 1e15 to 5e15at/cm/sup 2/. Accuracy is very good on the whole range of parameter variations. 2D process simulations are finally shown.