학술논문

A flexible processor for FFT and Viterbi algorithms
Document Type
Conference
Source
2012 International Symposium on Communications and Information Technologies (ISCIT) Communications and Information Technologies (ISCIT), 2012 International Symposium on. :931-935 Oct, 2012
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Viterbi algorithm
Computer architecture
Decoding
Standards
Algorithm design and analysis
Complexity theory
Heuristic algorithms
Software Radio
Parametrization
Parallel Vector Processor
Common Operator
FFT
Viterbi
Language
Abstract
This paper proposes a flexible architecture for the FFT and Viterbi algorithms based on the Common Operator (CO) technique. The FFT and Viterbi structural similarities are investigated to build a common architecture for both algorithms where area is traded against throughput. FPGA implementation and experimental results are discussed in this paper.