학술논문

Reliability of embedded SONOS memories
Document Type
Conference
Source
Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Solid-state device research conference Solid-State Device Research Conference, 2004. ESSDERC 2004. Proceeding of the 34th European. :277-280 2004
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
SONOS devices
Nonvolatile memory
CMOS process
Tunneling
Character generation
Dielectric devices
Fabrication
Charge carrier processes
Electron traps
Distributed control
Language
Abstract
In this work, arrays of two transistor (2T) and compact SONOS memory cells are presented together with an extensive reliability investigation. SONOS, which stands for semiconductor-oxide-nitride-oxide-semiconductor, is a non-volatile memory concept, which has recently regained strong attention because floating gate flash has reached its scaling limits. The better scaling perspective, together with the ease of integration in a base line CMOS process, makes SONOS an excellent candidate for embedded flash in future CMOS generations. This is especially true for the compact cell variant, which consists of a merged access gate (AG) and control gate (CG), giving extra advantages like smaller cell size and the reduction of short channel effects compared with the discrete two transistor variant.