학술논문
On the 6T-SRAM Cells Degradation Characterization in Ultra-Scaled CMOS Technologies
Document Type
Conference
Author
Source
2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Reliability physics symposium, 2007. proceedings. 45th annual. ieee international. :668-669 Apr, 2007
Subject
Language
ISSN
1541-7026
1938-1891
1938-1891
Abstract
The large number of reliability challenges in stand-alone MOS transistors publications in last decades IRPS conferences put forward the difficulty to make high quality, low cost and reliable process transistor. A large work has been done at transistor level, and it is now interesting to verify experimentally the link between transistors degradation and circuit performance decrease. The 6T-SRAM cell has been chosen since its performances are directly impacted by negative bias temperature instability (NBTI) and hot carrier injection (HCI) degradation (Li, 2005)