학술논문

DFM: where's the proof of value?
Document Type
Conference
Source
2006 43rd ACM/IEEE Design Automation Conference Design Automation Conference Design Automation Conference, 2006 43rd ACM/IEEE. :1061-1062 2006
Subject
Computing and Processing
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Design for manufacture
Manufacturing
Lithography
Integrated circuit yield
Testing
Time to market
Predictive models
Costs
Thermal stresses
Integrated circuit technology
Design
Algorithms
DFM
Design for yield
ROI
RET
OPC
Yield optimization
Language
ISSN
0738-100X
Abstract
How can design teams employ new tools and develop response methodologies yet still stay within design budgets? How much effort does it require to be an early adopter and what kind of measurable results compensate for this effort? Panelists discuss how their design-for-manufacture (DFM) tools fit into a fixed design methodology, budget and timeline, and give examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield). The aim of this panel is to provide a serious comparison of related DFM technologies on the market and some idea of the cost and difficulty of integrating the tools into a fixed design budget and timeline. Specific results are cited, along with examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield enhancement). The audience should walk away with enough information to make an informed decision on which companies would make sense for their DFM challenges, to reach their own yield and throughput goals.