학술논문

A Novel Array-Based Test Methodology for Local Process Variation Monitoring
Document Type
Periodical
Source
IEEE Transactions on Semiconductor Manufacturing IEEE Trans. Semicond. Manufact. Semiconductor Manufacturing, IEEE Transactions on. 24(2):280-293 May, 2011
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Logic gates
Resistance
Transistors
Arrays
Layout
Current measurement
Voltage measurement
Automatic test equipment
measurement techniques
mismatch
process variation
test structure design
test structures
transistor array
Language
ISSN
0894-6507
1558-2345
Abstract
As process technologies continually advance, local process variation has greatly increased and gradually become one of the most critical factors for integrated circuit manufacturing. To monitor local process variation, a large number of devices-under-test (DUTs) in close proximity must be measured. In this paper, we present a novel array-based test structure to characterize local process variation with limited area overhead. The proposed test structure can guarantee high measurement accuracy by application of the test techniques proposed in this paper: hardware IR compensation, voltage bias elevation, and leakage-current cancelation. Furthermore, the DUT layout need not be modified for the proposed test structure. Thus, the measured variation exactly reflects the reality in the manufacturing environment. The measured results from the few most advanced process-technology nodes demonstrate the effectiveness and efficiency of the proposed test structure in quantifying local process variation.