학술논문
A Memory-Access-Efficient Adaptive Implementation of kNN on FPGA through HLS
Document Type
Conference
Author
Source
2019 IEEE 37th International Conference on Computer Design (ICCD) Computer Design (ICCD), 2019 IEEE 37th International Conference on. :177-180 Nov, 2019
Subject
Language
ISSN
2576-6996
Abstract
To reduce the impact of the memory-access constraint in k-Nearest Neighbors (kNN) problems, in this paper we implement one kNN kernel through high-level synthesis (HLS) on FPGA by employing two data access reduction methods: low-precision data representation and principal component analysis based filtering (PCAF). The kernel is called MPCAF-kNN (Memory-efficient PCAF kNN), which has been highly optimized to fully exploit the characteristics of FPGA. It is adaptive to all key parameters. We evaluate MPCAF-kNN by comparing it with a state-of-the-art kNN implementation on a high-end CPU server. Our results show that MPCAF-kNN achieves up to a performance equivalent to that of a 56-thread of CPU server while greatly reducing external memory-accesses.