학술논문
An integrated layout system for sea-of-gates module generation
Document Type
Conference
Author
Source
Proceedings of the European Conference on Design Automation. Design Automation. EDAC., Proceedings of the European Conference on. :237-241 1991
Subject
Language
Abstract
Presents a sea-of-gates layout system able to design medium-size logic circuits in a true channelless fashion. The methodology relies on flexible leaf cell generation, systematic cell terminal abutment, a global routine scheme using integer linear programming methods, and a step-wise compaction-rerouting refinement. Modules up to several hundred transistors have been laid out compactly with more than 80% transistor utilization with two layers of metal. With top-down hierarchy, those modules can be used as macrocells.ETX