학술논문

A Comprehensive Comparison of Different Wafer/Channel Orientations for Ultrascaled Nanosheet FETs
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 71(3):1784-1791 Mar, 2024
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Mathematical models
Crystals
Logic gates
Quantum capacitance
Field effect transistors
Scattering
Performance evaluation
Ballistic transport
channel orientation
crystal orientation
nanosheet FETs (NSFETs)
quantum confinement
uniaxial stress
wafer orientation
Language
ISSN
0018-9383
1557-9646
Abstract
In this article, we evaluate various crystal orientation configurations for silicon ultrascaled nanosheet FETs (NSFETs) to explore the optimum combination of wafer surface and channel orientations. The increasingly prominent physical phenomena, including quantum confinement and quasi-ballistic transport, are captured physically by advanced simulation methodology. The carrier density profile and transport-related parameters exhibit a strong dependence on the crystallographic orientations of the channel and the wafer directions. The quantum confinement effects are least pronounced in the n-type NSFETs with a (100) surface, and the p-type NSFETs with a (110) surface. The $\langle {100} \rangle $ and $\langle {111} \rangle $ channel orientations demonstrate the largest ballistic injection velocity for electrons and holes, respectively. Uniaxial stress technology, as an efficient performance booster, may further improve the transport properties, but the enhancement may saturate at high stress level. In the ballistic limit, we predict that the homo-oriented CMOS inverter of ${(}{110}{)}/\langle {111} \rangle $ configuration has a more balanced N/P current, and the hetero-oriented CMOS inverter, comprising a $5\,\,{\times }\,\,10$ nm n-type NSFET of ${(}{100}{)}/\langle {100} \rangle $ and a $5\,\,{\times }\,\,10$ nm p-type NSFET of ${(}{110}{)}/\langle {111} \rangle $ , will yield a speed enhancement exceeding 20% when compared with the prevailing industry standard of the ${(}{100}{)}/\langle {110} \rangle $ configuration.