학술논문
Impact of grain number fluctuations in the MOS transistor gate on matching performance
Document Type
Conference
Author
Source
International Conference on Microelectronic Test Structures, 2003. Microelectronic test structures Microelectronic Test Structures, 2003. International Conference on. :244-249 2003
Subject
Language
Abstract
This paper presents a compact model for the gate impact on MOS transistor matching. It is based on the random variations of grain number in the polycrystalline gate. The model is validated by fitting mismatch increase with substrate bias. This study highlights the importance of local polysilicon depletion and gives a better understanding of complex mechanisms that are responsible for MOSFET mismatch.