학술논문
A high-performance BICMOS Technology with double-polysilicon self-aligned bipolar devices
Document Type
Periodical
Author
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 8(11):509-511 Nov, 1987
Subject
Language
ISSN
0741-3106
1558-0563
1558-0563
Abstract
A high-performance BICMOS technology is described which incorporates 12-GHz double-polysilicon self-aligned bipolar, fully salicided CMOS devices and 1-µm features. This process is applied to a new BICMOS gate design, called transistor feedback logic (TFL), to fabricate a divide-by-16 frequency divider with a maximum operating frequency of 364 MHz. Availability of uncompromised MOS and bipolar transistors allows a free mix of pure CMOS, pure bipolar, or BICMOS gates on the same chip.