학술논문

1-1-1 MASH $\Delta \Sigma$ Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping
Document Type
Periodical
Source
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 47(9):2093-2106 Sep, 2012
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Computing and Processing
Multi-stage noise shaping
Noise
Quantization
Oscillators
Jitter
Clocks
Delay-line assisted calibration
delta-sigma
MASH
noise-shaping
temperature-stable
time-to-digital converter
Language
ISSN
0018-9200
1558-173X
Abstract
Two 1-1-1 MASH $\Delta \Sigma$ time-to-digital converters (TDCs) are presented in this paper. Third-order time domain noise-shaping has been adopted by the TDCs to achieve better than 6 ps resolution. Following a detailed analysis of the noise generation and propagation in the MASH $\Delta \Sigma$ structure, the first prototyping TDC has been realized in $0.13~\mu{\rm m}$ CMOS technology. It achieves an ENOB of 11 bits and consumes 1.7 mW from a 1.2 V supply. In the second MASH TDC, a delay-line assisted calibration technique is introduced to mitigate the phase skew caused by the large comparator delay, which is the main limiting factor of the MASH TDC's resolution. The demonstrated TDC achieves an ENOB of 13 bits and a wide input range of 100 ns. This TDC shows a temperature coefficient of $176~{\rm ppm}^{\circ}{\rm C}$ within a temperature range of $-20$ to $120^{\circ}{\rm C}$. It consumes only 0.7 mW and occupies $0.08~{\rm mm}^{2}$ area (core).