학술논문

Diffusion-less junctions and super halo profiles for PMOS transistors formed by SPER and FUSI gate in 45 nm physical gate length devices
Document Type
Conference
Source
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. Electron devices meeting Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. :99-102 2004
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
MOSFETs
Doping
Rapid thermal annealing
Plasma temperature
Thermal resistance
Silicon
Electrodes
Space technology
CMOS technology
Microelectronics
Language
Abstract
This paper reports on the successful integration of truly diffusion-less (less-than-650/spl deg/C) junction formation by SPER in pMOSFETs in combination with Ni-FUSI gates for the first time. The obtained drive currents are 355 /spl mu/A//spl mu/m for an off-state of 10 /spl mu/A//spl mu/m at Vdd= -1.2V and 1.4nm EOT SiON. We demonstrate that the gate de-activation problem associated with SPER is effectively solved by the use of the FUSI gate electrode. Super halo profiles are obtained with SPER, which opens up the halo design space for accurate SCE control. The junction leakage is greatly reduced by engineering the damage region away from the junction depletion region.