학술논문

Changing test and data modeling requirements for screening latent defects as statistical outliers
Document Type
Periodical
Source
IEEE Design & Test of Computers IEEE Des. Test. Comput. Design & Test of Computers, IEEE. 23(2):100-109 Apr, 2006
Subject
Computing and Processing
Logic testing
Statistical analysis
Application specific integrated circuits
Manufacturing
Frequency
Logic devices
Delay
Stress measurement
Microelectronics
Large scale integration
reliability
statistical outlier screening
data modeling
adaptive testing
Language
ISSN
0740-7475
1558-1918
Abstract
The expanded role of test demands a significant change in mind-set of nearly every engineer involved in the screening of semiconductor products. The issues to consider range from DFT and ATE requirements, to the design and optimization of test patterns, to the physical and statistical relationships of different tests, and finally, to the economics of reducing test time and cost. The identification of outliers to isolate latent defects will likely increase the role of statistical testing in present and future technologies. An emerging opportunity is to use statistical analysis of parametric measurements at multiple test corners to improve the effectiveness and efficiency of testing and reliability defect stressing. In this article, we propose a "statistical testing" framework that combines testing, analysis, and optimization to identify latent-defect signatures. We discuss the required characteristics of statistical testing to isolate the embedded-outlier population; test conditions and test application support for the statistical-testing framework; and the data modeling for identifying the outliers.