학술논문

Overcoming the challenges in thin wafer (/spl les/8 mils) manufacturing
Document Type
Conference
Source
2004 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (IEEE Cat. No.04CH37530) Advanced semiconductor manufacturing Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop. :5-9 2004
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Manufacturing
Silicon
Etching
Wheels
Stress
Chemicals
Adhesives
Rough surfaces
Surface roughness
Hafnium
Language
Abstract
In this paper effective manufacturing of power discrete devices on thinned (/spl les/8 mils or /spl sim/200 /spl mu/m) 200 mm substrates will be discussed. The findings in this study can also be applied to integrated circuit technologies. Most of the challenges occur in the back end of line (BEOL) where the substrate thinning typically is performed; therefore issues in this area will be discussed. The other key areas that will be discussed are substrate issues, wafer handling issues, and equipment & tool issues. The overall goal will be to highlight challenges in each area and denote possible or existing resolutions that enable high yield and low breakage manufacturing.