학술논문
An Academic RISC-V Silicon Implementation Based on Open-Source Components
Document Type
Conference
Author
Abella, J.; Bulla, C.; Cabo, G.; Cazorla, F.J.; Cristal, A.; Doblas, M.; Figueras, R.; Gonzalez, A.; Hernandez, C.; Jimenez, V.; Kosmidis, L.; Kostalabros, V.; Langarita, R.; Leyva, N.; Lopez-Paradis, G.; Marimon, J.; Martinez, R.; Mendoza, J.; Moll, F.; Moreto, M.; Pavon, J.; Ramirez, C.; Ramirez, M.A.; Rojas, C.; Rubio, A.; Ruiz, A.; Sonmez, N.; Soria, V.; Teres, L.; Unsal, O.; Valero, M.; Vargas, I.; Villa, L.
Source
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS) Design of Circuits and Integrated Systems (DCIS), 2020 XXXV Conference on. :1-6 Nov, 2020
Subject
Language
ISSN
2640-5563
Abstract
The design presented, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V processor designed and fabricated by a Spanish or Mexican academic institution, and will be the basis of future RISC-V designs jointly developed by these institutions. This paper summarizes the design tasks, for FPGA first and for SoC later, from high architectural level descriptions down to RTL and then going through logic synthesis and physical design to get the layout ready for its final tapeout in CMOS 65nm technology.