학술논문

Charge confining mechanisms in III-V semiconductor nanowire
Document Type
Conference
Source
2019 International Conference on Numerical Simulation of Optoelectronic Devices (NUSOD) Numerical Simulation of Optoelectronic Devices (NUSOD), 2019 International Conference on. :19-20 Jul, 2019
Subject
Components, Circuits, Devices and Systems
Fields, Waves and Electromagnetics
Photonics and Electrooptics
Nanowires
Crystals
Strain
Charge carrier processes
Gallium arsenide
Electric potential
Photonic band gap
Language
ISSN
2158-3234
2158-3242
Abstract
III-V semiconductor nanowires exhibit unique features for application in novel optoelectronic devices. Due to their large surface-to-volume ratio, the realization of heterostructures beyond the capabilities of planar growth, that can still be integrated in Si-based electronics, becomes possible. Furthermore, polytypism was observed e.g. in GaAs nanowires such that different crystal phases coexist in the same nanowire. As different crystal phases have different electronic properties, this feature can be exploited to form crystal-phase heterostructures with atomically flat interfaces and only very small elastic deformation. We will discuss the specifics of electronic-structure simulations in such nanowires and present recent example studies.