학술논문

A case study of high pin count area array ceramic package crack
Document Type
Conference
Source
1995 Proceedings. 45th Electronic Components and Technology Conference Electronic components and technology Electronic Components and Technology Conference, 1995. Proceedings., 45th. :917-921 1995
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
Computer aided software engineering
Ceramics
Temperature
Integrated circuit packaging
Tensile stress
Thermal stresses
Soldering
Pins
Printed circuits
Assembly
Language
Abstract
The need for higher circuit density on a integrated circuit (IC) with high pin count requires a large substrate size package to accommodate its wiring. This paper presents issues, approaches, and solutions for a high pin count (447 pins) microprocessor ceramic packaging with a focus on the package cracking. The effects of printed circuit board thickness, package standoff height, and environmental conditions on high pin count ceramic pin grid array (CPGA) package cracking are reviewed and discussed.