학술논문

Demonstration of a Multi-Level μA-Range Bulk Switching ReRAM and its Application for Keyword Spotting
Document Type
Conference
Source
2022 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2022 International. :18.4.1-18.4.4 Dec, 2022
Subject
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Semiconductor device modeling
Histograms
Computational modeling
Prototypes
Switches
Artificial neural networks
Programming
Language
ISSN
2156-017X
Abstract
Despite the great promises of resistive random-access memory (ReRAM) for fast, low-power in memory computing, the models deployed on ReRAM crossbars suffer from accuracy loss, due to poor yield, inaccurate switching and high noise. In this paper, we report a forming-free bulk ReRAM (b-ReRAM) cell that can be programmed up to 128 levels between 400nA $(4\mu \mathrm{S})$ and $4\mu A (40\mu S)$. The device operates by continuous modulation of bulk oxygen vacancies, therefore exhibiting favorable characteristics including forming-free operation, analog switching, low noise and low operating currents [1], [2]. The multilayer ReRAM stack is deposited using a specially built 300mm deposition system that features a clustered sequence of Physical Vapor Deposition (PVD) and Atomic Layer Deposition (ALD), leading to high wafer-level yield and uniformity. High programming accuracy can be achieved over 25k b-ReRAM devices across 15 dies. A fully integrated system on chip (SoC) with BEOL-integrated b-ReRAM arrays is built with 65nm CMOS technology, and keyword spotting (KWS) is demonstrated with accuracy equivalent to the software quantized model and high energy efficiency at 98.5 TOPS/W. Moreover, we evaluate the performance of the bitcell for large neural network (NN) applications in a custom hardware-aware simulation platform and show that software comparable accuracy can be achieved. This work for the first-time reports that high yield and high programming accuracy can be achieved with b-ReRAM at the wafer-level scale and demonstrates that superior analog behavior enables the mapping of NN models onto the ReRAM-based SoC prototype with no accuracy loss and high energy efficiency.