학술논문
High-Work-Function Ir/HfLaO ${\rm p}$-MOSFETs Using Low-Temperature-Processed Shallow Junction
Document Type
Periodical
Author
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 55(3):838-843 Mar, 2008
Subject
Language
ISSN
0018-9383
1557-9646
1557-9646
Abstract
We report a high effective work function (${\bm \phi}_{{\bf m}\hbox{-}{\bf eff}}$) and a very low $V_{t}$ Ir gate on HfLaO ${\rm p}$-MOSFETs using novel self-aligned low-temperature shallow junctions. This gate-first process has shallow junctions of 9.6 or 20 nm that are formed by solid phase diffusion using $\hbox{SiO}_{2}$-covered Ga or Ni/Ga. At 1.2-nm effective oxide thickness, good ${\bm \phi}_{{\bf m}\hbox{-}{\bf eff}}$ of 5.3 eV, low $V_{t}$ of ${+}\hbox{0.05}$ V, high mobility of 90 cm$^{2}$/V $\cdot$s at ${-}\hbox{0.3}$ MV/cm, and small 85 $^{\circ}$C negative bias-temperature instability (NBTI) of 20 mV (10 MV/cm for 1 h) are measured for Ir/HfLaO ${\rm p}$-MOSFETs.