학술논문
Design space exploration of a 2-D DWT system architecture
Document Type
Conference
Source
2010 IEEE Conference on Cybernetics and Intelligent Systems Cybernetics and Intelligent Systems (CIS), 2010 IEEE Conference on. :36-40 Jun, 2010
Subject
Language
ISSN
2326-8123
2326-8239
2326-8239
Abstract
This paper proposes a programmable 2-D DWT system architecture designed for the JPEG-2000 standard. The proposed system architecture, derived from an iterative design space exploration process using Altera's C2H compiler, provides a significant performance acceleration of 2-D DWT when compared to an optimized 2-D DWT software implementation and is capable of real-time video processing performance up to 720p (1280 × 720) image resolutions when synthesized and tested on an Altera DE3 Stratix III FPGA board.