학술논문

Investigation on Vision System: Digital FPGA Implementation in Case of Retina Rod Cells
Document Type
Periodical
Source
IEEE Transactions on Biomedical Circuits and Systems IEEE Trans. Biomed. Circuits Syst. Biomedical Circuits and Systems, IEEE Transactions on. 18(2):299-307 Apr, 2024
Subject
Bioengineering
Components, Circuits, Devices and Systems
Retina
Mathematical models
Hardware
Biological system modeling
Photoreceptors
Field programmable gate arrays
Table lookup
Digital
Field-Programmable Gate Arrays (FPGA)
implementation
light adaptation
rod retinal cell
Language
ISSN
1932-4545
1940-9990
Abstract
The development of prostheses and treatments for illnesses and recovery has recently been centered on hardware modeling for various delicate biological components, including the nervous system, brain, eyes, and heart. The retina, being the thinnest and deepest layer of the eye, is of particular interest. In this study, we employ the Nyquist-Based Approximation of Retina Rod Cell (NBAoRRC) approach, which has been adapted to utilize Look-Up Tables (LUTs) rather than original functions, to implement rod cells in the retina using cost-effective hardware. In modern mathematical models, numerous nonlinear functions are used to represent the activity of these cells. However, these nonlinear functions would require a substantial amount of hardware for direct implementation and may not meet the required speed constraints. The proposed method eliminates the need for multiplication functions and utilizes a fast, cost-effective rod cell device. Simulation results demonstrate the extent to which the proposed model aligns with the behavior of the primary rod cell model, particularly in terms of dynamic behavior. Based on the results of hardware implementation using the Field-Programmable Gate Arrays (FPGA) board Virtex-5, the proposed model is shown to be reliable, consume 30 percent less power than the primary model, and have reduced hardware resource requirements. Based on the results of hardware implementation using the reconfigurable FPGA board Virtex-5, the proposed model is reliable, uses 30% less power consumption than the primary model in the worth state of the set of approximation method, and has a reduced hardware resource requirement. In fact, using the proposed model, this reduction in the power consumption can be achieved. Finally, in this article, by using the LUT which is systematically sampled (Nyquist rate), we were able to remove all costly operators in terms of hardware (digital) realization and achieve very good results in the field of digital implementation in two scales of network and single neuron.