학술논문
New compact model for performance and process variability assessment in 14nm FDSOI CMOS technology
Document Type
Conference
Author
Source
Proceedings of the 2015 International Conference on Microelectronic Test Structures Microelectronic Test Structures (ICMTS), 2015 International Conference on. :59-64 Mar, 2015
Subject
Language
ISSN
1071-9032
2158-1029
2158-1029
Abstract
This paper provides a compact model for performance and process variability assessment in 14nm FDSOI CMOS technology. It is used to investigate MOS performance relation with process parameters. Then production device within wafer variability has been modeled using backward propagation of variance (BPV). This application allows spotting the main model parameter contributing to the total MOS transistor resistance (R on ) variability.