부산대학교 도서관

The experimental results of the characterization of a multi-channel Application Specific Integrated Circuit (ASIC), called RIGEL, designed for the sparse readout of a Pixel Silicon Drift Detector (PixDD) for soft X-ray space telescopes are presented. The RIGEL ASIC front-end architecture is composed by a 2-D matrix of 16×16 square readout pixel cells (RPCs) with 300 μm pitch, arranged to host a central octagonal pad for the PixDD anode bump-bonding, and the full-analog processing chain. Each RPCs can be configured to provide a shaped or stretched output signal, with selectable peaking times from 0.5 μs to 5 μs. The back-end electronics, on the chip periphery, includes 16 (one per row) 10-bits Wilkinson ADCs, the global and local configuration registers and a trigger management circuit. The characterization of the RIGEL ASIC and PixDD detector has been carried out on a dedicated experimental setup; the RPCs have been tested sequentially with a series of artificial pulses and characterized in terms of pulse shaping, stretching functionality, conversion gain and electronic noise. The ASIC has a chip area of ~70 mm 2 and a power consumption of 640 μW/channel. A mean conversion gain equal to 26.6 eV/ADU –1 has been measured, and a mean intrinsic equivalent energy resolution of 100 eV Full Width at Half Maximum (FWHM) measured on test pulse at room temperature has been recorded on the stand-alone chip. When coupled to the PixDD, a mean energy resolution of 162 eV FWHM of all active pixels has been measured at the 5.9 keV line of 55 Fe at 0°C.