학술논문

A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers
Document Type
Periodical
Source
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 53(3):681-691 Mar, 2018
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Computing and Processing
Transfer functions
Attenuation
Wireless communication
Baseband
Detection algorithms
Wireless sensor networks
Gain
Analog to digital converter (ADC)
baseband
blocker
digital
digital to analog converter (DAC)
filtering
long-term evolution (LTE)
reconfigurable
wireless receiver (RX)
Language
ISSN
0018-9200
1558-173X
Abstract
This paper presents a long-term evolution (LTE) receiver (RX) front end with a digital filtering analog to digital converter (ADC) in the baseband to perform multi-band blocker cancellation. The digital filtering ADC has a digitally defined transfer function that is highly reconfigurable and insensitive to PVT variations. The dynamic range requirement of the blocker cancellation feedback digital to analog converter (DAC) is relaxed with a trivial uncalibrated first-order passive high-pass filter. The programmable digital filter provides 34.9-dB attenuation of transmitter leakage and variable attenuation of an additional blocker anywhere in the frequency range 17.5–107.5 MHz. A blocker detection algorithm for this RX is presented and takes approximately 26 $\mu \text{s}$ to converge. The RX front end operates at 1.8 GHz with a noise figure of 3.9 dB and IIP3 of −5 dBm, and consumes only 20.4–37.5 mW, the lowest among the state-of-the-art designs.