학술논문

Successful Development and Implementation of Statistical Outlier Techniques on 90nm and 65nm Process Driver Devices
Document Type
Conference
Source
2006 IEEE International Reliability Physics Symposium Proceedings Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International. :552-559 Mar, 2006
Subject
General Topics for Engineers
Automatic testing
Manufacturing
Delay
Driver circuits
Circuit testing
Integrated circuit testing
Current measurement
Power measurement
Current supplies
Power supplies
Language
ISSN
1541-7026
1938-1891
Abstract
Burn-in and the concomitant post-burn-in retest are significant cost adders to the overall IC manufacturing and test process. Methods to reduce burn-in capacity are continually sought. Traditional outlier screens such as fixed-limit analyses with parametric or non-parametric statistics, when applied to the newest technologies, result in excessive Type I or II errors which cannot be tolerated. In this paper, we describe the results from applying statistical burn-in avoidance techniques using time-zero sort test responses to driver designs fabricated in 90nm and 65nm low leakage technologies and libraries.