학술논문
High speed digital VLSI fuzzifier
Document Type
Conference
Author
Source
Proceedings of the 39th Midwest Symposium on Circuits and Systems Midwest symposium on circuits and systems Circuits and Systems, 1996., IEEE 39th Midwest symposium on. 1:519-522 vol.1 1996
Subject
Language
Abstract
A digital high speed VLSI fuzzifier is introduced. It is characterized by a trapezoidal membership function which is defined in terms of four programmable parameters. Simulations of the SPICE file extracted from the layout of the fuzzifier show that fuzzification is performed in less than 30 nS. Utilization of the fuzzifier in a multiplexed fashion for implementation of a compact, fuzzy inference engine is discussed.