학술논문

Effect of Annealing Temperature on $\hbox{TiO}_{2}$ -Based Thin-Film-Transistor Performance
Document Type
Periodical
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 33(7):1009-1011 Jul, 2012
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Annealing
Thin film transistors
Bonding
Logic gates
Vibrations
Temperature
semiconductor–insulator interfaces
thin-film transistors (TFTs)
%24%28%5Chbox{TiO}%5F{2}%29%24+<%2Ftex><%2Fformula>%22">titanium oxide $(\hbox{TiO}_{2})$
Language
ISSN
0741-3106
1558-0563
Abstract
$\hbox{TiO}_{x}$ thin-film transistors (TFTs) are fabricated using $\hbox{SiO}_{2}$ as gate dielectrics. The enhancement of the electric characteristics is observed after a postannealing processing including the reduction of the threshold voltage $V_{\rm th}$, the increase in mobility $\mu$, and the on/off ratio. The effect of the postannealing temperature on both the $\hbox{TiO}_{x}/\hbox{SiO}_{2}$ interfacial bonding structure and the $\hbox{TiO}_{x}$ crystallinity is investigated. We suggest that the interfacial modification at the $\hbox{TiO}_{x}/\hbox{SiO}_{2}$ interface contributes to the significant reduction of $V_{\rm th}$ due to the breaking of Si–O–Ti bonding. The improvement of the $\hbox{TiO}_{x}$ crystallinity and interfacial structure leads to the increase in $\mu$ and in the on/off ratio. The low-temperature annealing treatment at 200 $^{\circ}\hbox{C}$ is very effective to improve the $\hbox{TiO}_{x}/\hbox{SiO}_{2}$ interface structure.