부산대학교 도서관

This paper describes and demonstrates a high-throughput strategy for making fan-out packages for very small, sub-millimeter, devices. First, micro-transfer printing was used to deterministically assemble large arrays of devices, face-up, onto 200 mm wafers. The devices used in this study were 80 um x 40 um chips with a redistribution metal and six contact pads designed to be used as an electrical test vehicle. The printed devices are approximately two microns in thickness. After assembly of the reconfigured wafers, they undergo a standard wafer level redistribution and bumping process. The final fan-out package pitch on the 200 mm wafer is 1.4mm x 1.0mm with six 250 um solder bumps. The fan-out packages were assembled and reflowed onto FR4 test boards specifically designed for this study. The process and interconnect yield will be reported, as well as initial reliability testing results. In summary, we have demonstrated a new strategy for cost effective fan-out packaging of very small devices. This strategy depends on a massively parallel deterministic assembly process capable of delivering very thin devices to the reconfigured package substrate. A key attribute of this approach is that no molding compound is used in the package.