학술논문
A 3, 3V 12bits rail-to-rail ADC SAR for neuronal implant
Document Type
Conference
Author
Source
Proceedings of the 8th IEEE International NEWCAS Conference 2010 NEWCAS Conference (NEWCAS), 2010 8th IEEE International. :5-8 Jun, 2010
Subject
Language
Abstract
This paper presents the development of a low-power rail-to-rail SAR-ADC to be used in a medical implants. The first part discusses the principle schematic and the requirements for the neuronal implant application. Additionally, a full description of each part of this ADC SAR will be given. And finally the last part presents measurement results of a fabricated test chip in 0.35µM CMOS technology, with 86µW of power consumption, 12bits of resolution, and a speed of 24Ks/S.