학술논문

Optimizing Ferroelectric and Interface Layers in HZO-Based FTJs for Neuromorphic Applications
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 69(2):808-815 Feb, 2022
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Iron
Switches
Tunneling
Modulation
Switching circuits
Hafnium oxide
Reliability
Ferroelectric tunnel junction (FTJ)
hafnium zirconium oxide
metal-ferroelectric-insulator-semiconductor (MFIS)
Language
ISSN
0018-9383
1557-9646
Abstract
Nonvolatile memories especially the ferroelectric (FE)-based ones such as ferroelectric tunnel junctions (FTJs) and ferroelectric field-effect transistors (FeFETs) have recently attracted a lot of attention. FTJs have been intensively researched for the last decade and found to be very promising memory devices due to their significant nondestructive readout advantage as compared to conventional ferroelectric random access memory (FRAM). However, more research is needed on FTJ devices to obtain reliable endurance and retention behavior. In this article, we demonstrate the characteristics and performance of zirconium-doped hafnium oxide-based FTJ devices in terms of FE switching and reliability. This is investigated for FTJ stack structure tuning as well as for the FE switching process in FTJ devices. The FTJ memory switching characteristics, the effects of polarization switching on the write conditions, and the impact of pulse width and pulse amplitude on switching are investigated. The impact of FE layer thickness and interface layer type/thickness are reported to obtain a maximum FTJ ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio (memory window) and reliable performance. The maximum ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio changes depending on the FE layer (zirconium-doped HfO 2 layer) thickness (12, 8, 6, and 4 nm), the interface layer type (SiO 2 , Al 2 O 3 ), and thickness (1 and 2 nm), indicating the maximum value of ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio for a 1 nm SiO 2 interface layer stack. Moreover, a stable endurance of 10 4 cycles is reported and extrapolated measurements suggest stable retention for more than ten years. Time-dependent breakdown analysis was performed to investigate the reliability of devices indicating a lifetime of ten years.