학술논문

A hardened technology on SOI for analog devices
Document Type
Conference
Source
RADECS 91 First European Conference on Radiation and its Effects on Devices and Systems Radiation and its Effects on Devices and Systems, 1991. RADECS 91., First European Conference on. :211-214 1991
Subject
Fields, Waves and Electromagnetics
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Nuclear Engineering
Detectors
Physics
CMOS technology
Large Hadron Collider
Electronic equipment testing
Neutrons
Elementary particles
Analog-digital conversion
Transistors
Immunity testing
Language
Abstract
Presents a hardened and mixed analog-digital technology under development. This technology now includes a PJFET with a quite good hardness, CMOS transistors with a potential multi-megarad hardness and first tests of bipolar transistors with a not yet optimized structure (structure of the JFET). All the results achieved so far, together with the optimizations under way will lead to an analog technology with a digital capability and a high level of hardness (neutron fluence, cumulated dose, immunity to upsets) to address the needs of military applications and electronics for the elementary particles physics detectors of the next generation colliders.ETX