부산대학교 도서관

In this work, the performance of a Double-Gate Junctionless MOSFET (DGJLT) is reported for low power digital applications. The model is based physically, considering both the inversion and accumulation operating conditions. The analysis demonstrates the transistor behavior in the sub-threshold regime. SILVACO ATLAS TCAD tool is used extensively to validate the results of the proposed circuits. DGJLT transistors are found to have overall better performance at low supply voltage significantly. Hence, DGJLT transistor-based Inverter has been adopted for the reference. Analytical models of power dissipation, delay and power delay product (PDP) of the Inverter are detailed. The intended study gives a better view and understanding of the applications of energy efficient digital logic of the device at low power.