학술논문

Design of Large-Scale Stochastic Computing Adders and their Anomalous Behavior
Document Type
Conference
Source
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023. :1-6 Apr, 2023
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Robotics and Control Systems
Correlation
Costs
Filtering
Computational modeling
Neurons
Stochastic processes
Inverters
stochastic computing
weighted addition
large scale
design trade-offs
accuracy analysis
digital filtering
Language
ISSN
1558-1101
Abstract
Stochastic computing (SC) uses streams of pseudo-random bits to perform low-cost and error-tolerant numerical processing for applications like neural networks and digital filtering. A key operation in these domains is the summation of many hundreds of bit-streams, but existing SC adders are inflexible and unpredictable. Basic mux adders have low area but poor accuracy while other adders like accumulative parallel counters (APCs) have good accuracy but high area. This work introduces parallel sampling adders (PSAs), a novel weighted adder family that offers a favorable area-accuracy trade-off and provides great flexibility to large-scale SC adder design. Our experiments show that PSAs can sometimes achieve the same high accuracy as APCs, but at half the area cost. We also examine the behavior of large-scale SC adders in depth and uncover some surprising results. First, APC accuracy is shown to be sensitive to input correlation despite the common belief that APCs are correlation insensitive. Then, we show that mux-based adders are sometimes more accurate than APCs, which contradicts most prior studies. Explanations for these anomalies are given and a decorrelation scheme is proposed to improve APC accuracy by 4x for a digital filtering application.