학술논문

Terabit-per-second automated digital testing
Document Type
Conference
Source
Proceedings International Test Conference 2001 (Cat. No.01CH37260) International test conference Test Conference, 2001. Proceedings. International. :1143-1151 2001
Subject
Components, Circuits, Devices and Systems
Signal Processing and Analysis
Power, Energy and Industry Applications
Automatic testing
Circuit testing
Logic testing
Frequency
Integrated circuit testing
Application specific integrated circuits
Aggregates
System testing
Logic devices
Sampling methods
Language
ISSN
1089-3539
Abstract
This paper describes a test application for an IC with over 200 logic signals each carrying multiple-gigahertz data. An aggregate data rate approaching a terabit-per-second is attained during the test. A high pin-count automated test system with a maximum frequency of 1.33 Gbps DNRZ is used as a development platform. Data rate tripling logic is added to the system to produce stimuli signals each with DNRZ rates up to 4 Gbps. High-speed sampling circuits are added to capture the device output signals at these same frequencies. Several example measurements illustrate the signal quality that is achieved. The extraordinary performance exhibited by this application represents one of the most challenging digital test applications reported to-date, and foreshadows expectations for future automated test equipment.