학술논문

Implementation of a Polyphase Filter Bank Channelizer on a Zynq FPGA
Document Type
Conference
Source
2020 Argentine Conference on Electronics (CAE) Electronics (CAE), 2020 Argentine Conference on. :57-62 Feb, 2020
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
General Topics for Engineers
Power, Energy and Industry Applications
Robotics and Control Systems
Simulation
Filter banks
Signal processing algorithms
Hardware
Reconfigurable architectures
Frequency division multiplexing
Field programmable gate arrays
Multirate signal processing
Polyphase Filter Bank
Discrete Fourier Transform
FIR Filtering
Language
Abstract
This paper describes the design and implementation of a 16-channel polyphase filter bank (PFB) channelizer. The PFB channelizer structure implements a resource-efficient multichannel digital receiver for a set of frequency division multiplexed (FDM) signals that exist in a single sampled data stream. The implementation is based on the Zynq® field programmable gate array (FPGA) and aims to exploit the potential for data reuse and flexibility offered by the PFB channelizer structure. General design criteria are summarized for the 16-channel polyphase filter bank channelizer. Python and Vivado simulation results of the performance and operation for the design are also presented.