학술논문

Sub-6V Operation of Split-Gate Type Charge-Trapping Nonvolatile Memory with High-k Trapping and Blocking Layers for High-Speed and HighlyReliable Embedded Flash
Document Type
Conference
Source
2020 IEEE International Memory Workshop (IMW) Memory Workshop (IMW), 2020 IEEE International. :1-4 May, 2020
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
SONOS devices
Silicon compounds
Nonvolatile memory
Capacitance-voltage characteristics
MOS capacitors
Split gate flash memory cells
Oxidation
high-k trapping layer
charge-trapping nonvolatile memory
hafnium silicon oxide
split-gate
SONOS
blocking layer structure
Language
ISSN
2573-7503
Abstract
High-k dielectrics are implemented in a split-gate type charge-trapping nonvolatile memory (SG-CTNVM) for the first time. Owing to the split-gate structure and optimized trapping properties of HfSiO film, a memory window of 3.0 V was realized under very low ±6 V and fast 1 μs program/ 100 μs erase condition. Retention property was significantly improved by insertion of SiON film in the middle of blocking Al 2 O 3 layer. The blocking SiON layer was formed by deposition technique only, without thermal oxidation which was found to bring P/E cycling degradation.