학술논문

Fabrication and Characterization of High-Mobility Solution-Based Chalcogenide Thin-Film Transistors
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 60(1):327-332 Jan, 2013
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Thin film transistors
Gold
Annealing
Fabrication
Contact resistance
Cadmium sulfide (CdS)
contact resistance
high mobility
photolithography
thin-film transistor (TFT)
Language
ISSN
0018-9383
1557-9646
Abstract
We report device and material considerations for the fabrication of high-mobility thin-film transistors (TFTs) compatible with large-area and inexpensive processes. In particular, this paper reports photolithographically defined n-type TFTs (n-TFTs) based on cadmium sulfide (CdS) films deposited using solution-based techniques. The integration process consists of four mask levels with a maximum processing temperature of 100 $^{\circ}\hbox{C}$. The TFT performance was analyzed in terms of the CdS semiconductor thickness and as a function of postdeposition annealing in a reducing ambient. The $I_{\rm on}/I_{\rm off}$ ratios are $\sim\!\! \hbox{10}^{7}$ with field-effect mobilities of $ \sim$5.3 and $\sim\!\hbox{4.7}\ \hbox{cm}^{2}/\hbox{V}\cdot \hbox{s}$ for Al and Au source–drain contacts, respectively, using 70 nm of CdS. Transmission electron microscopy and electron energy loss spectroscopy were used to analyze the CdS–metal interfaces.