학술논문
Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures
Document Type
Conference
Author
Coudrain, Perceval; Charbonnier, J.; Garnier, A.; Vivet, P.; Velard, R.; Vinci, A.; Ponthenier, F.; Farcy, A.; Segaud, R.; Chausse, P.; Arnaud, L.; Lattard, D.; Guthmuller, E.; Romano, G.; Gueugnot, A.; Berger, F.; Beltritti, J.; Mourier, T.; Gottardi, M.; Minoret, S.; Ribiere, C.; Romero, G.; Philip, P.-E.; Exbrayat, Y.; Scevola, D.; Campos, D.; Argoud, M.; Allouti, N.; Eleouet, R.; Fuguet Tortolero, C.; Aumont, C.; Dutoit, D.; Legalland, C.; Michailos, J.; Cheramy, S.; Simon, G.
Source
2019 IEEE 69th Electronic Components and Technology Conference (ECTC) Electronic Components and Technology Conference (ECTC), 2019 IEEE 69th. :569-578 May, 2019
Subject
Language
ISSN
2377-5726
Abstract
We report the first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested. Benefits of chiplet-based architectures are discussed. Built up technology is presented and focused on 3D interconnects process and characterization. 3D packaging is presented up to the successful structural test and characterization of the demonstrator.