학술논문
4×100Gb/s PAM4 Multi-Channel Silicon Photonic Chipset With Hybrid Integration of III-V DFB Lasers and Electro-Absorption Modulators
Document Type
Periodical
Author
Levy, J.S.; Timurdogan, E.; Kuo, Y.; Lyu, G.Y.; Tsai, C.; Yan, X.; Kim, H.; Stagarescu, C.; Meneou, K.; Thomas, A.; Fragkos, I.; Sitwell, G.; Trita, A.; Liu, Y.; Ziebel, M.; Byrd, J.; Steinbach, S.; Chou, B.; Vis, W.; Abed, A.; Kwon, Y.; Nykanen, H.; Lo, S.; Ikonen, J.; Larismaa, J.; Drake, J.; Benzoni, A.; Minkenberg, C.; Schrans, T.; Rickman, A.
Source
Journal of Lightwave Technology J. Lightwave Technol. Lightwave Technology, Journal of. 41(16):5350-5358 Aug, 2023
Subject
Language
ISSN
0733-8724
1558-2213
1558-2213
Abstract
A silicon photonic based transmitter and receiver chipset for 4×106Gb/s 400 GBASE-DR4 data rates is presented. Each channel of the transmitter chip reaches high extinction ratio and optical modulation amplitude (OMA) with a low TDECQ penalty in full compliance with the IEEE standard. The receiver chips possess high responsivity with low polarization dependent loss. The use of discrete III-V arrayed components hybridized onto the silicon platform and passive alignment of single-mode fibers provides a low-cost, compact and scalable solution extendable to even higher aggregate rates and channel count.