학술논문

A Dedicated Processor for Low-Level Vision
Document Type
Article
Source
IFAC-PapersOnLine; June 1986, Vol. 19 Issue: 9 p71-73, 3p
Subject
Language
ISSN
24058963
Abstract
A microprogrammable processor for low-level vision has been developed. It can be used as a slave processor in Multibus-based vision systems. The architecture of the processor is designed to be efficient in binary image analysis and in many common gray scale operations. The implemented operations include connectivity analysis and logical neighborhood operations for binary images, pixel operations, convolutions and geometric transformations for gray scale images and arithmetic and logical operations between two images. Typical execution times of operations vary from 50 ms to 500 ms for a 256 by 256 pixel image depending on the complexity of the operation. The processor is implemented in three boards with standard MSI and LSI technology. Potential applications for the processor are in industrial automation, graphics arts industry and medicine.

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