학술논문

A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting
Document Type
Article
Source
IEEE Journal of Solid-State Circuits; December 2023, Vol. 58 Issue: 12 p3555-3564, 10p
Subject
Language
ISSN
00189200; 1558173X
Abstract
Input buffers can be used to reduce the input load of high-resolution discrete-time (DT) Nyquist analog-to-digital converters (ADCs), which can be challenging to drive, particularly at high sampling rates, because of the large input sampling capacitance needed to reduce thermal noise. An input driving technique called predictive level-shifting is proposed to drive rail-to-rail signal swing without increasing the buffer supply rail for high linearity. This article demonstrates an easy-to-drive two-step successive approximation register (SAR) ADC with integrated input buffer, achieving 91.3 dB peak signal-to-noise-and-distortion ratio (SNDR) and 94.1 dB dynamic range (DR) with 6.6 V peak-to-peak differential signal swing and 4 MHz input frequency at 12 MS/s with 30.41 mW power consumption, demonstrating the best performance among the published literature.