학술논문

High-Accuracy Deep Neural Networks Using a Contralateral-Gated Analog Synapse Composed of Ultrathin MoS₂ nFET and Nonvolatile Charge-Trap Memory.
Document Type
Article
Source
IEEE Electron Device Letters; Nov2020, Vol. 41 Issue 11, p1649-1652, 4p
Subject
NONVOLATILE memory
VERTICAL integration
FIELD-effect transistors
THRESHOLD voltage
SYNAPSES
CONTROLLABILITY in systems engineering
Language
ISSN
07413106
Abstract
Copyright of IEEE Electron Device Letters is the property of IEEE and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)