부산대학교 도서관

In this brief, the monolithic integration of enhancement (E)-mode and depletion (D)-mode InAlN/GaN high-electron mobility transistors (HEMTs) is presented. The aim of this brief is to show the results of the designed NAND logic cell, which consists of both HEMTs integrated onto a single die. Large-signal models of dual-gate E-mode and D-mode HEMTs are proposed and calibrated by experimental results. We present well-calibrated electrophysical models for 2-D device simulations employing mixed-mode setup in Synopsys TCAD Sentaurus device. The mixed-mode approach interconnects dual-gate E-HEMT and D-HEMT to NAND logic cell circuit, which allows analysis and characterization of the device as the complex system. Good agreement between simulations and experimental results confirms the validity of the proposed models and simulation methodology. [ABSTRACT FROM AUTHOR]