학술논문

Design of multiple-valued logic gates using gate-diffusion input for image processing applications.
Document Type
Article
Source
Computers & Electrical Engineering. Jul2018, Vol. 69, p142-157. 16p.
Subject
*CARBON nanotube field effect transistors
*IMAGE processing
*MANY-valued logic
*SIGNAL-to-noise ratio
*MONTE Carlo method
Language
ISSN
0045-7906
Abstract
In this work, unique characteristics of carbon nano-tube field effect transistor (CNTFET) are used to propose a universal cell with a simple architecture based on the binary modified gate-diffusion input (m-GDI) method for designing fundamental gates in the voltage-mode multiple-valued logic (MVL) with any arbitrary number of logic levels for processing at nano-scales. The results of the simulations confirm more energy-efficiency, larger noise margins and lower sensitivity of the proposed designs in different logic levels as compared with the state-of-the-art designs. The effects of the process, voltage and temperature (PVT) variations are extensively evaluated by Monte–Carlo simulation. According to the results, the proposed designs are robust against PVT variations and noise. The proposed structure is applied to the MVL-based image processing. The results show that the output images of the proposed MVL-based inexact gates have an appropriate quality in compare with the images generated by the other similar exact gates. [ABSTRACT FROM AUTHOR]