학술논문
Electrical Characteristics of Memory Devices With a High-k HfO2 Trapping Layer and Dual SiO2 /Si3 N4 Tunneling Layer.
Document Type
Article
Source
Subject
*TUNNELING spectroscopy
*FLASH memory
*COMPUTER engineering
*NANOTECHNOLOGY
*COMPUTER programming
*TRAPPED-particle instabilities
*FERROELECTRIC RAM
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Language
ISSN
0018-9383
Abstract
A novel device structure with a high-k HfO2 charge storage layer and dual tunneling layer (DTL) (SiO2/Si3N4) is presented in this paper. Combining advantages of the high trapping efficiency of high-k materials and enhanced charge injection from the substrate through the DTL, the device achieves a fast program/erase speed and a large memory window. The device demonstrates excellent retention due to its physically thick DTL and also improved endurance without any increase of programming Vth throughout the cyclic test as compared with SONOS Flash memory devices using an Si3 N4 trapping layer. [ABSTRACT FROM AUTHOR]