소장자료
LDR | 01251camua2200289 a 4500 | ||
001 | 0000537027▲ | ||
005 | 20180520064604▲ | ||
008 | 890920s1990 maua b 001 0 eng ▲ | ||
010 | ▼a 89037031▲ | ||
020 | ▼a 0792390563▲ | ||
040 | ▼a 221016 ▼d 221016▲ | ||
050 | 0 | 0 | ▼a TK7871.99.M44▼b J49 1990▲ |
082 | 0 | 0 | ▼a 621.39732 ▼2 21▲ |
090 | ▼a 621.39732 ▼b J59t▲ | ||
100 | 1 | ▼a Jha, Niraj K.▲ | |
245 | 1 | 0 | ▼a Testing and reliable design of CMOS circuits /▼c by Niraj K. Jha and Sandip Kundu.▲ |
260 | ▼a Boston :▼b Kluwer Academic Pub. ,▼c c1990.▲ | ||
300 | ▼a xii, 231 p. :▼b ill. ;▼c 25 cm.▲ | ||
490 | 1 | ▼a Kluwer international series in engineering and computer science ;▼v SECS 88.▼a VLSI, computer architecture, and digital signal processing▲ | |
504 | ▼a Includes bibliographical references.▲ | ||
504 | ▼a Includes index.▲ | ||
650 | 0 | ▼a Metal oxide semiconductors, Complimentary▼x Testing.▲ | |
650 | 0 | ▼a Metal oxide semiconductors, Complimentary▼x Reliability.▲ | |
650 | 0 | ▼a Integrated circuits▼x Very large scale integration▼x Design and construction.▲ | |
700 | 1 | ▼a Kundu, Sandip.▲ | |
830 | 0 | ▼a Kluwer international series in engineering and computer science.▼p VLSI, Computer architecture, and digital signal processing▲ | |
990 | 0 | 0 | ▼a 정혜승 ▼b 정혜승▲ |
Testing and reliable design of CMOS circuits
자료유형
국외단행본
서명/책임사항
Testing and reliable design of CMOS circuits / by Niraj K. Jha and Sandip Kundu.
발행사항
Boston : Kluwer Academic Pub. , c1990.
형태사항
xii, 231 p. : ill. ; 25 cm.
총서사항
서지주기
Includes bibliographical references. Includes index.
주제
ISBN
0792390563
청구기호
621.39732 J59t
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